Jie and Yi

十年一箭呀，Silverbrook Research刚刚发布了Memjet技术，这种新的打印机用的是全幅MEMS喷头，基本上打印速度一秒钟一页以上。因为用了大规模MEMS fabrication工艺，这玩意只要200刀一台。看看这个录像 （这里还有更多录像）：

为什么说十年一箭呢？这个公司十年前startup，这中间申到了1400项专利，已经名列IT公司专利前十大，但是一个产品都没有。结果一出惊人呀！详细的情况这个网站有很多报道。

刚才仔细研究了一下这个技术。基本上秘诀就是在打印机里横向铺满喷头，所以不需要喷头扫来扫去了。 每个喷头只有15 微米边长，分辨率1600 dpi：

但是还有一大堆问题：

1.墨水必须非常快干，要不然前面的还没干后面一页都出来了。所以要易挥发的墨水。

2.墨水干得快喷头容易堵怎么办？解决办法是用湿空气对着吹保持湿度，如果堵了就用高频墨水流涮一下。

3.这么快的速度打一页照片的话数据传输率要不得了。据说差一点的usb2.0都不够。所以数据是压缩的然后打印机里面有一块system-on-a-chip集成cpu硬件解压并且直接控制到各个喷头。这个芯片还负责纠错功能，据说5%的头坏掉了都没关系。

总之那1400各专利都不是吃闲饭的。

看来今年等着上市的技术：No.1: Samsung 64GB Solid State Disk; No.2: MEMjet 打印机

The biggest news of today: Intel annouced that it plans to sell 45 nm process chips in 2nd half of this year, which will be the first commercial product to employ a high-k dielectric and metal gates for the CMOS.

This is actually a surprise move at least to me, since the 2005 Technology Roadmap projects that high-k will be deployed by 2008, while the 2006 update slashed that and postponed it to 2010. Granted, high-k has been studied for more than a decade, and Intel actually leads the herd when they first invented a P-type metal and N-type metal gate, which are a stack of multi-layer metallic compounds (think TiN, but nobody knows what’s in there) engineered to match the work function. That’s at the end of 2003. About the same time Robert Chau published on EDL world-record MOSFET performance using HfO2 gate stack. So now with the 45-nm process with high-k (my guess is a certain kind of hafnium silicate), Intel is a year ahead of IBM and AMD in terms of technology.

I’ve always believed that semiconductor industry is mostly about money, then technology. The whole Moore’s law thing is just an example of the marketing feedback to R&D. For Intel it’s all about beating IBM+AMD. Right now it is strangling them with the Core architecture and high-k, which I think may be an overkill. Another example is the SOI. Intel has been refusing to adopt it because obviously its bulk Si technology can sustain through 45 nm node. This has limited the supply market of SOI wafers, causing increased cost to AMD and IBM, which have been using SOI from 90nm and 65 nm, respectively. I have to say, great strategy, Intel!